| Good | C | To be completed | |
| Needs a task | A | Automatic translation. To check and correct | |
| obsolete or partial | X | Not useful, does not exist | |
| Non-existent or very obsolete | V | Text to be verified | |
| _* | moved | ||
| not verified |
| Act | Title | EN | FR | DE | PT | RU | HE | ZH | EL | ES | IT | NL | To do | |||
| Logisim References | ||||||||||||||||
| 3.9 | About the program | __ | __ | _A | __ | __ | __ | __ | ||||||||
| 3.9 | GNU General Public License v3 | __ | X | X | X | X | X | X | ||||||||
| 3.9 | GNU General Public License v3, translated | __ | __ | *T | __ | __ | __ | |||||||||
| 3.9 | The Logisim-evolution user’s Guide | __ | __ | __ | __ | __ | __ | __ | ||||||||
| 3.9 | Beginner's tutorial | __ | __ | __ | __ | __ | __ | __ | ||||||||
| 3.9 | Step 0: Orienting yourself | __ | __ | __ | __ | __ | __ | __ | ||||||||
| 3.9 | Step 1: Adding gates | __ | __ | __ | __ | __ | __ | __ | ||||||||
| 3.9 | Step 2: Adding wires | __ | __ | __ | __ | __ | __ | __ | ||||||||
| 3.9 | Step 3: Adding text | __ | __ | _A | __ | _A | __ | __ | ||||||||
| 3.9 | Step 4: Testing your circuit | __ | __ | __ | __ | __ | __ | __ | ||||||||
| 3.9 | Step 5: The step by step mode | _V | __ | _A | _A | _A | __ | __ | ||||||||
| 3.9 | The graphical interface | __ | __ | __ | _V | _V | __ | __ | ||||||||
| 3.9 | The canvas | _V | __ | __ | __ | VA | __ | __ | ||||||||
| 3.9 | The menus | _V | __ | _A | __ | _A | __ | __ | ||||||||
| 3.9 | The explorer pane | _V | __ | _V | _V | _V | __ | __ | ||||||||
| 3.9 | The tools bars | _V | _V | __ | __ | __ | __ | __ | ||||||||
| 3.9 | >The attribute table | __ | __ | __ | __ | __ | __ | __ | ||||||||
| 3.9 | >Attributes of tools and components | __ | __ | __ | __ | __ | __ | __ | ||||||||
| 3.9 | Subcircuits | __ | __ | _A | _V | _V | __ | __ | ||||||||
| 3.9 | Creating circuits | __ | __ | _A | _V | _V | __ | __ | ||||||||
| 3.9 | Using subcircuits | _V | __ | _A | _V | _V | __ | __ | ||||||||
| 3.9 | Selecting the appearance of a subcircuit | _V | __ | _A | _A | _A | __ | __ | ||||||||
| 3.9 | Personalise appearance | _V | __ | _A | _A | _A | __ | __ | ||||||||
| 3.9 | Debugging subcircuits | __ | __ | _A | _V | _V | __ | __ | ||||||||
| 3.9 | Logisim libraries | __ | __ | _A | __ | __ | __ | __ | ||||||||
| 3.9 | Additional features | _V | __ | _V | _V | _V | __ | __ | ||||||||
| 3.9 | Creating bundles | __ | __ | __ | __ | __ | __ | __ | ||||||||
| 3.9 | Splitters | __ | __ | _V | _V | _V | __ | __ | ||||||||
| 3.9 | Wire colors | _V | __ | _A | _V | _V | __ | __ | ||||||||
| 3.9 | Self-numbered labels | _V | __ | __ | _A | _A | _. | _. | ||||||||
| 3.9 | Placing components in a matrix | _V | __ | __ | _A | _A | __ | __ | ||||||||
| 3.9 | Combinational analysis | _V | __ | __ | __ | __ | _. | _. | ||||||||
| 3.9 | Opening Combinational Analysis | __ | __ | __ | __ | __ | __ | __ | ||||||||
| 3.9 | Editing the truth table | _V | __ | CA | CA | CA | __ | __ | ||||||||
| 3.9 | Creating expressions | __ | __ | CA | CA | CA | __ | __ | ||||||||
| 3.9 | Generating a circuit | __ | __ | _V | _V | _V | __ | __ | ||||||||
| 3.9 | Import/Export Table | _V | __ | __ | __ | __ | __ | __ | ||||||||
| 3.9 | Menu reference | __ | __ | _A | __ | __ | __ | __ | ||||||||
| 3.9 | The File menu | _V | __ | _V | _V | _V | __ | __ | ||||||||
| 3.9 | The Edit menu | _V | __ | _V | _V | CV | __ | __ | ||||||||
| 3.9 | The Project menu | _V | _V | CA | _C | _C | __ | __ | ||||||||
| 3.9 | The Simulate menu | _V | __ | CA | CV | CV | __ | __|||||||||
| FPGA Menu | ||||||||||||||||
| 3.9 | The Window and Help menus | __ | __ | _V | __ | __ | __ | __ | ||||||||
| 3.9 | Export tab | _V | __ | _V | _V | _V | __ | __ | ||||||||
| 3.9 | Printing tab | _V | __ | _V | _V | _V | __ | __ | ||||||||
| Assembly viewer | __ | __ | __ | __ | __ | __ | __ | |||||||||
| 3.9 | Memory components | _V | __ | __ | __ | __ | __ | __ | ||||||||
| 3.9 | Poking memory | _V | __ | CA | CA | CA | C_ | C_ | ||||||||
| 3.9 | Hex editor | _V | __ | C_ | CV | CV | C_ | C_ | ||||||||
| 3.9 | Pop-up menus and files | _V | __ | _V | _V | _V | _. | _. | ||||||||
| 3.9 | Memory file panel | _V | __ | __ | __ | __ | __ | __ | ||||||||
| 3.9 | v2.0 raw | _V | __ | __ | __ | __ | _. | _. | ||||||||
| 3.9 | v3.0 hex words | _V | __ | __ | __ | __ | _. | _. | ||||||||
| 3.9 | v3.0 hex bytes | _V | __ | __ | __ | __ | _. | _. | ||||||||
| 3.9 | Binary data | _V | __ | __ | __ | __ | _. | _. | ||||||||
| 3.9 | Ascii byte | _V | __ | __ | __ | __ | _. | _. | ||||||||
| 3.9 | Chronogram | _V | _V | __ | __ | __ | C_ | C_ | ||||||||
| 3.9 | The Selection tab | _V | _V | __ | __ | __ | __ | __ | ||||||||
| 3.9 | The Timetable tab | _V | _V | __ | __ | __ | __ | __ | ||||||||
| 3.9 | The options tab | __ | __ | __ | __ | __ | __ | __ | ||||||||
| 3.9 | Command-line verification | __ | __ | _T | __ | __ | __ | __ | ||||||||
| 3.9 | Substituting libraries | __ | __ | _T | __ | __ | __ | __ | ||||||||
| 3.9 | Other verification options | __ | __ | _T | __ | __ | __ | __ | ||||||||
| 3.9 | Testing multiple files | __ | __ | _T | __ | __ | __ | __ | ||||||||
| 3.9 | The Test Vector windows | _V | __ | __ | __ | __ | __ | __ | ||||||||
| 3.9 | Application preferences | _V | __ | __ | _V | _V | __ | __ | ||||||||
| 3.5 | The Template tab | __ | __ | __ | __ | __ | __ | __ | ||||||||
| 3.9 | The International tab | __ | __ | __ | C_ | C_ | __ | __ | ||||||||
| 3.9 | The Window tab | _V | _V | __ | CV | CV | __ | __ | ||||||||
| 3.5 | The Layout tab | C_ | C_ | __ | CT | CT | __ | __ | Edit image/Delete Use a colorbind... | |||||||
| 3.9 | The Simulation tab | C_ | C_ | __ | __ | __ | __ | __ | ||||||||
| 3.9 | The Experimental tab | __ | __ | __ | __ | __ | __ | __ | ||||||||
| The Sofware tab | ||||||||||||||||
| The FPGA tab | ||||||||||||||||
| 3.9 | The command line | __ | __ | _V | _V | _V | __ | __ | ||||||||
| 3.9 | Project options | __ | __ | __ | __ | __ | __ | __ | ||||||||
| 3.9 | The Simulation tab | _V | __ | __ | _V | _V | __ | __ | ||||||||
| 3.9 | The Toolbar tab | __ | __ | __ | __ | __ | __ | __ | ||||||||
| 3.9 | The Mouse tab | __ | __ | __ | _V | _V | __ | __ | ||||||||
| 3.0 | Value propagation | _V | __ | _A | __ | __ | __ | __ | ||||||||
| 3.9 | Gate delays | __ | __ | _A | __ | __ | __ | __ | ||||||||
| 3.9 | Oscillation errors | __ | __ | _A | __ | __ | __ | __ | ||||||||
| 3.9 | Shortcomings | __ | __ | _A | __ | __ | __ | __ | ||||||||
| 3.9 | JAR libraries | _V | _V | __ | __ | __ | __ | __ | ||||||||
| 3.9 | Gray Code Incrementer | _V | _V | __ | __ | __ | __ | __ | ||||||||
| Library Class | __ | _V | __ | __ | __ | __ | __ | |||||||||
| Simple Gray Code Counter | __ | _V | __ | __ | __ | __ | __ | |||||||||
| Gray Code Counter | __ | _V | __ | __ | __ | __ | __ | |||||||||
| Guidelines | __ | _V | _C | _C | _C | _C | _C | |||||||||
| 3.9 | Installing Logisim-evolution | _V | _V | __ | __ | __ | __ | __ | ||||||||
| 3.9 | Installing Logisim-evolution standard | _V | _V | __ | __ | __ | __ | __ | ||||||||
| 3.9 | Quickly install another standard version under Windows | _V | _V | __ | __ | __ | __ | __ | ||||||||